多通道并行TD-LTE小区搜索架构设计与FPGA实现  

Design and implementation of multi-channel based parallel cell search in TD-LTE networks using FPGA

作　　者：蒋青[1] 卢伟[1] 江宇航 魏珊[1] 

机构地区：[1]重庆邮电大学重庆市移动通信技术重点实验室,重庆400065

出　　处：《重庆邮电大学学报（自然科学版）》2017年第4期433-440,共8页Journal of Chongqing University of Posts and Telecommunications(Natural Science Edition)

基　　金：国家自然科学基金(61301126);重庆市基础与前沿研究计划项目(cstc2013jcyj A40032);重庆邮电大学博士启动基金(A2012-33);重庆邮电大学青年科学研究项目(A2013-31)~~

摘　　要：移动终端通过小区搜索完成与网络的接入工作。为了更快地完成时分长期演进(time division long term evolution,TD-LTE)系统小区搜索过程,与传统数字信号处理(digital signal processing,DSP)串行模式对比,从速度和面积两方面综合考虑,提出一种基于现场可编程门阵列(field programmable gate array,FPGA)的多通道并行小区搜索架构。主要工作集中在小区搜索整体方案设计和FPGA硬件实现上,在算法上对整个小区搜索算法架构进行了改进,同时根据硬件需求,利用以时钟换取速度的思想对FPGA硬件实现架构进行了优化。采用多通道并行高速乘法器进行序列相关检测和动态门限配置的方法,大大缩短了TD-LTE小区搜索的处理时间。并以Altera的EP4SGX230KF40C2芯片作为硬件平台进行了Modelsim功能仿真、板级验证等工作。实验结果表明,该设计方案的处理速度和数据精度均满足TD-LTE系统测试要求,性能远优于传统的DSP架构模式,可以应用到实际工程中。; The mobile terminal is connected with the network through the cell search. In order to do the cell search effi-ciently in time division long term evolution （TD-LTE） networks, a multichannel based parallel cell search architecture is proposed using field programmable gate array （ FPGA） . Compared with the traditional processing mode of digital signal pro-cessing （DSP） , the speed and area are considered in this paper whose main work is to design a systematic cell search scheme and to implement the system on hardware platform. The proposed scheme optimizes the cell search structure, and the implementation cost is reduced through a parallel multiplier based serial correlation detection and dynamic threshold configuration. Meanwhile, the Modelsim tests and corresponding experiments are conducted on Altera , s EP4SGX230KF40C2 chip. Experimental results show that the proposed scheme can well satisfy the requirement for process-ing speed and the accuracy of data in TD-LTE networks, and it also outperforms the traditional DSP based processing scheme. It can be applied to the practical project.

关 键 词：时分长期演进(TD-LTE)系统 小区搜索 多通道 并行 现场可编程门阵列(FPGA)实现 

分 类 号：TN929.5[电子电信—通信与信息系统]