超低时延免迭代CORDIC算法  

Ultra-low latency and omit-iteration CORDIC algorithm

作　　者：姚亚峰[1] 冯中秀 陈朝[1] 

机构地区：[1]中国地质大学机械与电子信息学院,湖北武汉430074

出　　处：《西安电子科技大学学报》2017年第4期162-166,173,共6页Journal of Xidian University

基　　金：湖北省自然科学基金资助项目(2014CFB896)

摘　　要：针对流水线结构实现的坐标旋转数字计算机算法精度必须用迭代次数作保证,而较多的迭代次数会导致时延过大、硬件资源消耗过多等问题,通过综合运用角度二极化重编码、角度区间折叠、合并迭代和优化查找表等原理,提出一种能够免去迭代运算的坐标旋转数字计算机实现算法.仿真实验结果表明,跟其他实现算法相比,该坐标旋转数字计算机算法只需要两个时钟周期便能得到输出结果,在硬件消耗和输出精度上也有一定改善,更适合高速、实时的应用场合.： The pipeline structure Coordinate Rotation Digital Computer （CORDIC） algorithm improves its precision by increasing the stages of iterations, which leads to a large delay, excessive consumption of hardware and limits its applications. The omit-iteration CORDIC algorithm is proposed to solve this problem by using the methods of binary to bipolar recoding, folding angle domain, merging iteration and optimizing the lookup table. Simulation results show that this method needs only two clock cycles to get the output and also makes improvement on the hardware consumption and its precision, especially having privilege to the application on high speed and real-time occasions compared with other realization of the CORDIC algorithm.

关 键 词：坐标旋转数字计算机 免迭代 二极化重编码 可编程逻辑门阵列 数字信号处理 

分 类 号：TN492[电子电信—微电子学与固体电子学] TN911.72