PFM开关电源集成电路的抗电磁干扰设计  

Anti-EMI Design for PFM Switched Mode Power Supply ICs

作　　者：居水荣[1] 王津飞 石径[1] 张子豪[1] 

机构地区：[1]江苏信息职业技术学院电子信息工程学院,江苏无锡214153

出　　处：《半导体技术》2017年第8期579-585,共7页Semiconductor Technology

基　　金：江苏省教育厅资助项目(PPZY2015B190);江苏省教育厅"青蓝工程"科技创新团队资助项目(苏教师(2016)15号)

摘　　要：针对脉冲频率调制(PFM)开关电源(SMPS)集成电路,提出了抗电磁干扰(EMI)设计的两种方法。通过采用零电流检测电路,控制开关电源集成电路中的开关金属氧化物半导体场效应晶体管(MOSFET)在第一个谷底导通,从而降低导通电流的尖峰值。通过采用恒压和恒流设计技术,使开关电源集成电路中的电压和电流得到限制,有助于降低电流纹波。采用CSMC 1μm 40 V高压工艺设计了PFM开关电源集成电路SX1618,将以上两种抗电磁干扰设计方法应用在该电路的设计中,并设计了针对性的保护结构。完成SX1618整体仿真和版图设计后进行了流片和封装,并将其应用在实际的开关电源中,经测试,开关电源的抗电磁干扰能力符合标准。Two anti-electromagnetic interference（ EMI） design methods were presented for the pulse frequency modulation（ PFM） switched mode power supply（ SMPS） IC. By using the zero current detecting circuit,the switched MOSFET of the SMPS IC was conducted at the first valley and the peak conductive current was reduced. The voltage and current of SMPS IC were limited,and the ripple wave of current was reduced through the technologies of constant voltage and constant current. The SX1618 circuit which was controlled by the PFM switch supply was designed with the CSMC 1 μm 40 V high voltage process. The above two anti-EMI design methods were used in the design of the circuit,and the targeted protective structure was designed. The wafer processing and the package were conducted after total simulation and layout design of SX1618,and it was used in actual SMPS. The test result shows that the antiEMI performance of the switch power supply conforms to the standard.

关 键 词：开关电源(SMPS)集成电路 抗电磁干扰(EMI) 谷底导通 恒压模式 恒流模式 

分 类 号：TN432[电子电信—微电子学与固体电子学]