嵌入式系统中锁存器电路节能设计仿真研究  

Research on Energy Saving Design and Simulation of Latch Circuit in Embedded System

作　　者：陈微[1] 张威[1] 

机构地区：[1]北华大学计算机科学技术学院,吉林吉林132012

出　　处：《计算机仿真》2017年第8期285-288,共4页Computer Simulation

基　　金：吉林市科技计划项目(2015334003);吉林省科技发展计划项目(20150441003SC)

摘　　要：对嵌入式系统中锁存器电路进行节能设计,能够有效提升系统的稳定性。对锁存器电路的节能设计时,由于系统需要调整空闲时间,导致得到的系统最小能耗值不准确。传统方法将锁存器电路状态差异度作为适应度函数,约束系统最小能耗值的波动,但迭代次数过多,导致节能效果不理想。提出基于禁忌策略的嵌入式系统中锁存器电路节能设计模型。组建嵌入式系统锁存器电路动态能耗模型,给出嵌入式系统运行周期内电路开关电容、电源电压以及频率之间的关系,得到电路电压转换消耗的转换能量,建立锁存器电路电压调度任务的优先序列,利用禁忌搜索策略通过调整已有调度增加任务的空闲时间,得到嵌入式电路系统最小能耗值,组建嵌入式系统中锁存器电路节能设计模型。仿真结果表明,所提模型设计的锁存器电路具有较好的瞬态特性和更低的功耗。An energy saving design method of latch circuit in the embedded system is proposed based on the taboo strategy. Firstly, the dynamic energy consumption model of latch circuit in the embedded system is built and the rela- tion of circuit switch capacitor, supply voltage, and frequency in the embedded system running cycle is given out. Then, the transformation energy consumed by the circuit voltage transformation is obtained, and the prior sequence of voltage scheduling task in the latch circuit is built. Moreover,the taboo strategy is used to increase the task idle time through adjusting the existing scheduling, and the minimum system energy consumption is obtained. Finally, the ener- gy saving design model of latch circuit in the embedded system is built. The experiment results show that the de- signed latch circuit has good transient performance and low energy consumption.

关 键 词：嵌入式系统 锁存器电路 节能设计模型 

分 类 号：TN432[电子电信—微电子学与固体电子学]