基于65nm高速SRAM全定制设计  

Full Custom Design of High Speed SRAM Based on 65nm

作　　者：贾柱良 杜明 兰韬 裴国旭 

机构地区：[1]深圳市国微电子股份有限公司,广东深圳518057

出　　处：《电脑与电信》2017年第7期44-47,共4页Computer & Telecommunication

摘　　要：工艺进入65nm后,芯片集成度越来越高,器件的尺寸原来越小,加上走线宽度的减少,互连寄生效应越来越大,对SRAM的性能的影响也愈加显著。本文从全定制的设计流程出发,介绍了怎样实现SRAM不同功能模块之间的版图布局和IP的设计。在保证模块性能的同时,减少互连寄生对SRAM的影响,保证SRAM的高速运行。As the technology minimum size reaches to 65nm, the chip integration is more and more high, the size of the device is smaller and the width of the line is also reduced. Because of these factors, the parasitic effect is larger and becomes more important to SRAM. This article uses the full custom design flow, introduces how to realize SRAM using different function module layout and IP module. It reduces the impact of interconnect parasitic and guarantees the high speed running of SRAM.

关 键 词：SRAM 全定制 版图 高速 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]