一种新颖的抗辐射加固SR锁存器设计  

Design of a Novel Radiation-hardened SR Latch

作　　者：苏霖[1] 王佳[1] 高武[1] 郑然[1] 魏晓敏[1] 胡永才 

机构地区：[1]西北工业大学计算机学院,陕西西安710072 [2]斯特拉斯堡大学,法国斯特拉斯堡67037

出　　处：《微电子学与计算机》2017年第9期136-140,共5页Microelectronics & Computer

基　　金：国家自然科学基金(11575144;61504108)

摘　　要：为了设计出抗辐射加固的DC-DC开关电源振荡器,其中SR锁存器的抗辐射性能至关重要,提出了一种新颖的抗辐射加固SR锁存器电路.该抗辐射加固SR锁存器基于空间冗余设计的思想,已经在标准商用2P5M0.25μm工艺下设计和验证,电路版图面积为130μm×50μm,能够抗最大的总剂量效应为100kRad(Si),可以承受的最大线性能量传输LET为85 MeV-cm2/mg.相比于三模冗余SR锁存器,所设计的抗辐射加固SR锁存器电路的晶体管数目更少,电路节点的临界电荷更大,在电路节点同时发生多处翻转的情况下,抗单粒子翻转的成功率更高.Abstract： In order to design the radiation-hardened oscillator of the DC-DC converter, in which the radiation- hardened performance of the SR latch is very important, a novel radiation-hardened SR latch is presented in this paper. The proposed radiation-hardened SR latch is based on space redundancy and has been designed and verified in a standard commercial 2P5M 0. 25 μm process. The die area of the latch is 130 μmX 50 μm Total ionizing dose tolerance is 100kRad（Si） and single event effect immuning to LET is 85MeV-cm2/mg. Compared with the triple modular redundancy SR latch, the proposed radiation-hardened SR latch has less transistors, larger critical charge of the circuit node and higher success rate of the circuit immuning to single event upset when more than one circuit nodes are upset at the same time.

关 键 词：振荡器 SR锁存器 辐射加固 三模冗余 

分 类 号：TN402[电子电信—微电子学与固体电子学]