基于FPGA的超高速CameraLink图像传输  

Ultra-high speed CameraLink image transmission based on FPGA

作　　者：隋延林[1,2] 何斌[1] 张立国[1] 王文华[1] 陈嘉南[3] 

机构地区：[1]中国科学院长春光学精密机械与物理研究所,长春130033 [2]中国科学院大学,北京100039 [3]电子科技大学微电子与固体电子学院,成都610054

出　　处：《吉林大学学报（工学版）》2017年第5期1634-1643,共10页Journal of Jilin University:Engineering and Technology Edition

基　　金：国家自然科学基金项目(61405191)

摘　　要：基于现场可编程门阵列(FPGA)XC6LX100T设计了两套CameraLink接口传输的硬件平台,提出在实验中结合使用片上调试工具Chipscope和同步发生源模块用于精确测量FPGA中的传输误码的方法,详细对比了基于FPGA设计的CameraLink接口与DS90CR287、DS90CR288A的传输效果。结果表明:相对现今主流CameraLink接口电路,本文使用低压差分对代替大量并行数据线,最高可支持154 MHz像素时钟,单个CameraLink接口的传输速率可达4.31Gbit/s,突破了串并转换芯片传输速率的瓶颈,FPGA直接输出的CameraLink数据可以驱动6m的CameraLink传输线,图像可长时间正常无误显示,设计的系统可应用于各种基于CameraLink接口的传输系统。Based on Field Programmable Gate Array(FPGA),two sets of CameraLink interface transfer hardware platform are designed to compare serial-parallel converter chip and CameraLink interface based on FPGA).A new method,in which on-chip debugging tool Chipscope is combined with synchronized generation module,is proposed to detect error data accurately.The results show that CameraLink interface based on FPGA uses fewer pins with higher speed transmission rates.Single port supports a maximum transfer rate of 4.31Gbit/s when the pixel clock is 154 MHz.The CameraLink data output can drive 6 m CameraLink transmission line,with no bit error appears for long hours,and it can be used in a variety of different systems based on CameraLink interface.

关 键 词：信息处理技术 CAMERALINK 现场可编程门阵列 串行解串 片上调试 

分 类 号：TN911[电子电信—通信与信息系统]