基于ADF4351和FPGA的合成频率源的设计  

Design of a frequency synthesizer based on ADF4351 and FPGA

作　　者：王晗 程诚[1] 施嘉儒[1] 

机构地区：[1]清华大学工程物理系

出　　处：《电子技术应用》2017年第10期34-38,43,共6页Application of Electronic Technique

摘　　要：以数字锁相环ADF4351和Xilinx公司的Spartan-6系FPGA为主要元件设计了一个合成频率源。重点讨论了ADF4351的工作原理、两者之间的SPI通信过程、电路板的设计过程,并给出了关键的控制代码和性能测试结果。该频率源具有结构简单、成本低廉、代码占用资源少、易于维护和升级等特点,在100~700 MHz的宽频范围内可输出SFDR为40 d B左右的稳定波形。Frequency synthesizers are indispensable parts of a RF（Radio Frequency） system. This paper makes a study of how to design a frequency synthesizer by using a digital PLL（Phase-locked Loops） ADF4351 and a Spartan-6 FPGA（Field Programmable Gate Array）. This paper mainly discusses the principles of ADF4351, the SPI（Serial Peripheral Interface） communication between the two parts, and the design of the PCB（Printed Circuit Board）, and also give key HDL（Hardware Description Language） codes and the result of its performance. The characteristics of this frequency synthesizer is low-cost, resource-saving, and easy to construct or up-grade. It has the best performance between 100 MHz and 700 MHz with SFDR（Spurious-free Dynamic Range） of around 40 dB.

关 键 词：锁相环 FPGA 频率源 ADF4351 SPI HDL 

分 类 号：TN454[电子电信—微电子学与固体电子学]