椭圆曲线密码处理器的高效并行处理架构研究与设计  

Research and Design of Efficient Parallel Processing Architecture for Elliptic Curve Cryptographic Processor

作　　者：戴紫彬[1] 易肃汶 李伟[1,2] 南龙梅[1,2] 

机构地区：[1]解放军信息工程大学,郑州450000 [2]复旦大学专用集成电路与系统国家重点实验室,上海201203

出　　处：《电子与信息学报》2017年第10期2487-2494,共8页Journal of Electronics & Information Technology

基　　金：国家自然科学基金(61404175)~~

摘　　要：为了解决当前椭圆曲线密码处理器普遍存在灵活性低、资源占用大的问题,该文采用统计建模的方式,以面积-时间(AT)综合性能指标为指导,提出了一种面向椭圆曲线密码并行处理架构的量化评估方式,并确定3路异构并行处理架构可使处理器综合性能达到最优。其次,该文提出一个分离分级式存储结构和一个运算资源高度复用的模运算单元,可增强存储器的访问效率和运算资源的利用率。在90 nm CMOS工艺下综合,该文处理器的面积为1.62 mm^2,完成一次GF(2^(571))和GF(p^(521))上的点乘运算分别需要2.26 ms/612.4μJ和2.63 ms/665.4μJ。与同类设计相比,该文处理器不仅具有较高的灵活性、可伸缩性,而且其芯片面积和运算速度达到了很好的折中。To overcome the common problem of low flexibility and much resource in Elliptic Curve Cryptographic （ECC） processor, a quantitative evaluation on Area-Time product （AT） for parallel processing architecture of ECC processor is proposed by statistics and modeling, and a conclusion that 3-way processing architecture is optimal can be drawn. Besides, a separated and hierarchical storage structure is exploited to strengthen the efficiency of data interaction. At the same time, a modular arithmetic unit is designed with a high level of resource reuse. Using 90 nm CMOS technology, the proposed processor occupied 1.62 mm^2 can perform the scalar multiplication in 2.26 ms/612.4 μJ over GF（25T1） and 2.63 ms/665.4 μJ over GF（p521）, respectively. Compared to other works, this processor is advantageous not only in flexibility and scalability but also in making a good compromise between the hardware and the speed.

关 键 词：椭圆曲线密码 并行处理架构 量化评估 分离分级式存储结构 资源复用 

分 类 号：TP309.7[自动化与计算机技术—计算机系统结构] TN402[自动化与计算机技术—计算机科学与技术]