CMOS数字IC三态输出管脚漏电路径分析  

CMOS Digital IC Three-State Output Terminals Leakage Fault Localization

作　　者：李兴鸿 赵俊萍 王勇 方测宝 黄鑫 

机构地区：[1]北京微电子技术研究所,北京100076

出　　处：《环境技术》2017年第4期80-82,共3页Environmental Technology

摘　　要：本文从双电源电压三态输出电路原理结构图出发,列出了引起VOL、VOH、IOZH、IOZL失效的可能原因,通过估算指出引起高阻高电平漏电失效而其它功能参数都正常的失效模式的失效位置为输出NMOS管的驱动级的PMOS管漏电所致。IC with failure This paper starts from circuit schematic diagram about dual power supply voltage CMOS digital three-state output, listed possible causes of out states leakage, and pointed out that IOZH caused by leakage of PMOS which is pre-drive CMOS while other parameters are quite normal by simple calculation.

关 键 词：CMOS数字IC 三态输出 漏电 故障定位 

分 类 号：TN432[电子电信—微电子学与固体电子学]