SoC芯片FPGA原型的软硬件协同验证  

FPGA Prototype Hardware/Software Co-verification Based on SoC

作　　者：程翼胜 Cheng Yisheng(College of Communication and Information Engineering, Chongqing University of Posts and Telecommunications ,Chongqing 400065 ,Chin)

机构地区：[1]重庆邮电大学通信与信息工程学院,重庆400065

出　　处：《单片机与嵌入式系统应用》2017年第11期7-10,13,共5页Microcontrollers & Embedded Systems

摘　　要：在IC设计中,验证占据着举足轻重的地位。为了达到高效率、高可靠性的验证结果,保证芯片在流片的成功率,引入了FPGA原型验证技术。本文以一款低功耗报警器SoC为对象,首先简单介绍了低功耗报警器SoC芯片的系统架构,然后详细说明了报警器SoC芯片FPGA原型验证的具体实现。利用软硬件协同验证方法,验证了报警器SoC芯片模块的功能以及系统验证。In the IC design, the verification occupies a pivotal position.In order to achieve high efficiency and high reliability of the verifica- tion results to ensure that the chip in the success rate of the chip, FPGA prototype verification technology is introduced.In this paper, based on a low-power alarm SoC chip,first of all,a brief introductionof the low-power alarm SoC chip system architecture is introduced, and then the specific implementation of the alarm SoC chip FPGA prototype verification is descriped in detail. The function of the SoC chip module and the system verification are verified by the hardware and software co-verification method.

关 键 词：SOC FPGA 原型验证 

分 类 号：TN47[电子电信—微电子学与固体电子学]