基于通用可重构处理器的A5算法优化设计实现  

Optimization design and implementation of A5 algorithm based on general reconfigurable processor

作　　者：胡志言 杜学绘[1,2] 曹利峰[1,2] HU Zhi-yan DU Xue-hui CAO Li-feng(College of Cyberspace Security, Information Engineering University, Zhengzhou 450001,China State Key Laboratory of Mathematical Engineering and Advanced Computing,Information Engineering University, Zhengzhou 450001,China)

机构地区：[1]信息工程大学网络空间安全学院,河南郑州450001 [2]信息工程大学数学工程与先进计算国家重点实验室,河南郑州450001

出　　处：《计算机工程与设计》2017年第11期2891-2897,共7页Computer Engineering and Design

基　　金：国家863高技术研究发展计划基金项目(2012AA012704);国家自然科学基金项目(61502531)

摘　　要：针对A5-1序列密码算法软件实现速度慢和硬件实现灵活性差的问题,采用时间映射Temporal Mapping和空间映射Spatial Mapping相结合的方法,根据流水线和并行优化设计思想,设计并实现基于通用可重构处理器GReP的A5-1序列密码算法,从提高PE计算并行度和降低PE中ALU计算的访存代价两方面进行优化设计。仿真结果表明,基于GReP实现的A5-1序列密码算法的性能是基于Intel Atom230处理器软件实现的5.2倍,是基于Temporal Mapping设计思想实现的2.2倍。Traditional A5-1 stream cipher algorithm is inefficient on software implementation and inflexible on hardware implementation.Aiming at these problems,the A5-1 algorithm based on general reconfigurable processer GReP was designed and realized.And the method combined Temporal Mapping and Spatial Mapping.The design philosophy of pipelining and parallel was adopted.The scheme was designed optimally in view of improving PE computational parallelism and of reducing memory access cost of ALU in PE.Results of the simulation indicate that the performance of the A5-1 algorithm based on GReP is 5.2 times as much as that of the Intel Atom230 processor,which is 2.2 times as much as that of the design based on the Temporal Mapping.

关 键 词：A5算法 通用可重构处理器 线性反馈移位寄存器 流水线 并行优化 

分 类 号：TP309.7[自动化与计算机技术—计算机系统结构]