基于内插的Gardner位定时算法仿真与实现  

Simulation and implementation of Gardner bit timing algorithm based on interpolation

作　　者：刘迎超 邱元腾 李春海 

机构地区：[1]山东航天电子技术研究所,山东省烟台市264300

出　　处：《电子技术（上海）》2017年第11期51-53,共3页Electronic Technology

摘　　要：文章讨论了一种不受载波多普勒影响的Gardner位定时同步算法,并对该算法进行了MATLAB仿真与FPGA实现。基于内插的Gardner位定时算法不调整本地采样时钟,通过对输入的基带信号进行插值获得最佳采样时刻的采样值,从而实现数字码元同步。In this paper, a kind of Gardner timing synchronization algorithm which is not affected by carrier doppler is discussed, and MATLAB simulation and FPGA implementation are carried out. Based on interpolated Gardner bit timing algorithm, the local sampling clock is not adjusted, and the sampling value of the optimal sampling time is obtained through the interpolation of the input baseband signal, so that the digital code element synchronization can be realized.

关 键 词：内插 GARDNER 位同步 

分 类 号：TP391.9[自动化与计算机技术—计算机应用技术]