A Compact Implementation of AES S-Box Using Evolutionary Algorithm  

作　　者：LIU Yaoping WU Ning ZHANG Xiaoqiang ZHOU Fang GE Fen 

机构地区：[1]College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics

出　　处：《Chinese Journal of Electronics》2017年第4期688-695,共8页电子学报（英文版）

基　　金：supported by the Natural Science Foundation of China(No.61376025);the Industry-academic Joint Technological Innovations Fund Project of Jiangsu(No.BY2013003-11);the Fundamental Research Funds for the Central Universities(No.NS2016041)

摘　　要：S-Box based on Composite field arithmetic(CFA) technology is optimized by Genetic algorithm(GA)and Cartesian genetic programming(CGP) model for reducing the hardware complexity. After using the CFA technique to map Multiplicative inverse(MI) over GF(2~8)into composite field GF((2~4)~2), the compact MI circuit over GF(2~4) is selected from 100 evolved circuits, and same design method is applied to the compact multiplication circuit over GF(2~2). Compared with the direct implementations, the areas of optimized circuits of MI over GF(2~4) and multiplication over GF((2~2)2) are reduced by66% and 57.69%, respectively. The area reductions for MI over GF(2~8) and the whole of S-Box are up to 59.23%and 56.14%, separately. In 180 nm 1.8V COMS technology,compared to previous works, the S-Box proposed in this paper has the minimum area and minimum power, which are 11.27% and 6.65% smaller than that of the smallest area S-Box, respectively.S-Box based on Composite field arithmetic（CFA） technology is optimized by Genetic algorithm（GA）and Cartesian genetic programming（CGP） model for reducing the hardware complexity. After using the CFA technique to map Multiplicative inverse（MI） over GF（2~8）into composite field GF（（2~4）~2）, the compact MI circuit over GF（2~4） is selected from 100 evolved circuits, and same design method is applied to the compact multiplication circuit over GF（2~2）. Compared with the direct implementations, the areas of optimized circuits of MI over GF（2~4） and multiplication over GF（（2~2）2） are reduced by66% and 57.69%, respectively. The area reductions for MI over GF（2~8） and the whole of S-Box are up to 59.23%and 56.14%, separately. In 180 nm 1.8V COMS technology,compared to previous works, the S-Box proposed in this paper has the minimum area and minimum power, which are 11.27% and 6.65% smaller than that of the smallest area S-Box, respectively.

关 键 词：Advanced encryption standard(AES) Composite field arithmetic(CFA) S-BOX Evolutionary al gorithm(EA) 

分 类 号：TP18[自动化与计算机技术—控制理论与控制工程] TP309.7[自动化与计算机技术—控制科学与工程]