GF(2~m)域上的低功耗可配置ECC点乘算法ASIC设计实现  

Low Power Configurable ASIC Based Elliptic Curve Scalar Multiplication Over GF(2~m)

作　　者：车光宁 张钊锋[1] 

机构地区：[1]中国科学院上海高等研究院,上海201210 [2]中国科学院大学,北京100049 [3]上海科技大学信息科学与技术学院,上海201210

出　　处：《微电子学与计算机》2018年第1期15-20,共6页Microelectronics & Computer

摘　　要：针对射频识别(RFID)和无线传感网(WSN)等领域的高安全、低功耗、轻量化和可拓展等应用需求,设计一种GF(2~m)域上实现的椭圆曲线标量乘法电路.通过对椭圆曲线标量乘法整体架构实现进行逐层分级优化改进,尤其对标量乘核心模块——模乘和模逆进行了低功耗设计改进.经过Xilinx FPGA工具仿真和Synopsys Design Compiler工具验证,该椭圆曲线标量乘法架构灵活可拓展,GF(2^(163))域上一次点乘运算仅需要138k个时钟周期并且在TSMC 0.13μm工艺下等效面积仅为11.9k,相比较同类设计,面积和执行速度都有着效果显著的优势,可以胜任像RFID以及WSN一样资源受限的应用场合使用.Aiming at the design requirements of high security, low power consumption, light implementation and eonfigurable requirements for radio frequency identification （RFID） and wireless sensor networks （WSN） applications, an elliptic curve scalar multiplication circuit is designed. Through the overall optimization of the whole architecture of the elliptic curve scalar algorithm layer by layer, especially for the lower power design of the core scalar module： modular multiplication and inversion. Through the Xilinx FPGA tool simulation and the comprehensive verification of Design Compiler tools of Synopsys, the scalar multiplication architecture is proved flexible and expandable, one elliptic curve scalar point multiplication over GF（216a ） is only 138 k clock cycles and the equivalent gate area with TSMC 0. 13 tam is only 11. 9 k, compared with similar designs, the area and the implementation of the speed has a significant advantage, it can be used for RFID. WSN and other resource- constrained applications.

关 键 词：椭圆曲线点乘算法 有限域算术 低功耗 FPGA ASIC 

分 类 号：TN47[电子电信—微电子学与固体电子学]