逻辑函数基于AXIG实现面积优化  

Area Optimization Technique Based on AXIG for Logic Functions

作　　者：赵思思[1] 夏银水[1] 马雪娇[1] 吴世雄 ZHAO Si-si;XIA Yin-shui;MA Xue-jiao;WU Shi-xiong(Institute of Circuits and System, Ningbo University, Ningbo 315211, China)

机构地区：[1]宁波大学电路与系统研究所,宁波315211

出　　处：《无线通信技术》2017年第4期6-11,共6页Wireless Communication Technology

基　　金：国家自然科学基金(61131001)项目

摘　　要：该文提出了一种逻辑函数基于与/异或/非图(And-Xor-Inverter graph,AXIG)的双逻辑优化与映射方法:通过AXIG结构表示TBL和RML,选择不同的XOR结构进行图压缩,并对映射过程中的局部逻辑结构重映射,最终实现逻辑函数的面积优化方法。实验结果表明,与学术界逻辑综合优化工具ABC相比,平均AXIG节点数明显减少,电路中的晶体管数具有一定改进。This paper proposes a novel method for logic functions synthesis using called dual logicbased on And -Xor- Inverter graph （AXIG）. First, logic function is represented in And -Invertergraph （AIG） and an optimized AXIG is constructed by detecting the structure of XOR logic; Sec-ond, transistor count is used to measure the area of the circuit in the process of technology mapping.Finally, the area optimization method based on AXIG is realized. The proposed method is implemen-ted in C language and tested on MCNC benchmarks. Compared with state - of - the - art optimiza-tion tools, the experimental results show the efficiency of the proposed method.

关 键 词：双逻辑 与非图(And-Inverter graph) 工艺映射 Reed-Muller逻辑 

分 类 号：TP331[自动化与计算机技术—计算机系统结构]