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作 者:李少康[1] 杨宝平 祝强[1] 王林艳[1] 王建华[1]
机构地区:[1]西安工业大学,陕西西安710021
出 处:《电子设计工程》2018年第4期10-14,共5页Electronic Design Engineering
基 金:国家自然科学基金资助项目(51475351);陕西省协同创新计划项目(2015XT-32)
摘 要:为提高蜗杆测量精度,设计了新的测量机测头数据采集电路。基于FPGA并采用自顶向下设计方法和Verilog HDL编程技术,设计了采集电路的逻辑控制模块。基于AD977设计了三通道模数转换电路,每通道由独立的模数转换器及其前端信号调理电路构成。FPGA与前端模数转换电路以及后端数据总线之间均设计了电平转换电路。对所设计电路在测量机上进行了综合噪声实际测试,结果表明所采集数据的样本标准差均低于0.5μm,达到了预期目的。The new data acquisition circuit of the probe was designed for improving the measurement accuracy of the worm on the gear measuring machine. The top-down design method was used in the FPGA implementation based on the Verilog HDL for the logic control module. The AD977 was adopted in analog -to-digital conversion circuit consisted of three independent channels and each channel contains an A/D converter and its signal disposal circuit. The level shift circuit was used in both the FPGA front-end interface with the A/D and the FPGA after-end interface with the data bus. Comprehensive noise measurement was carried out for the data acquisition circuit. The results show that the sample standard deviation of the data collected is less than 0.5 txm and the expected effect is achieved.
分 类 号:TN98[电子电信—信息与通信工程]
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