基于分段多项式近似的DDFS研究及FPGA实现  

FPGA implementation of a direct digital frequency synthesizer based on piecewise polynomial approximation

作　　者：韩潇 曾立 占丰 陈昱 

机构地区：[1]北京航空航天大学空间与环境学院,北京100191 [2]山东航天电子技术研究所,山东烟台264000

出　　处：《电子技术应用》2018年第3期22-25,30,共5页Application of Electronic Technique

基　　金：国家自然科学基金(41274190;41074130)

摘　　要：提出一种直接数字频率合成器(DDFS)的设计方法,采用分段多项式近似的算法模型代替传统的查找表方式,实现相位至余弦幅度的映射。选择拟合余弦函数均方误差最小的两段四阶偶次幂多项式,使在合成信号的无杂散动态范围(SFDR)达到最大(94.98 dBc)。然后基于FPGA实现了相幅映射为14位输入位宽结构的DDFS,对实现该方法定点量化的数字系统进行了分析和优化,结果表明,量化后的DDFS输出信号幅度的绝对误差小于2.6×10^(-4),SFDR约93 dBc,接近理论上的SFDR上界。该研究工作为下一代天基感应式磁力仪的高精度在轨定标信号源提供一种可能的新方法。A design of direct digital frequency synthesizer（ DDFS） is proposed in this paper. Piecewise polynomial approximation algorithm is used to replace the look-up table, which leads to a phase to cosine amplitude mapper. The polynomial expression chosen by minimum-mead square error is used to achieve the maximum spurious free dynamic range（ SFDR）, about 94. 98 dBc. A DDFS of14 bit input phase to amplitude mapper is developed in FPGA and an optimized digital system is designed to implement the method. It is shown that digitized amplitude error is smaller than 2.6×10^（-4） and promising result of 93 dBc SFDR, which is much closer to theoretical upper bound. This study also provide a new method about scaling signal source for next generation induction magnetometer.

关 键 词：直接数字频率合成器 分段多项式近似 无杂散动态范围 FPGA 

分 类 号：TN431.2[电子电信—微电子学与固体电子学]