基于FPGA的千兆级AFDX端系统设计与实现  

Design and Implementation of Gigabit AFDX End System Based on FPGA

作　　者：施雯雯 徐雄[2] 谭永亮[1] SHI Wen-wen1, XU Xiong2, TAN Yong-liang1(1.China National Aeronautic Radio Electronics Research Institute, Shanghai 200241, China; 2.Shanghai Jiao Tong University, Shanghai 200241, Chin)

机构地区：[1]中国航空无线电电子研究所,上海200241 [2]上海交通大学,上海200241

出　　处：《航空电子技术》2018年第1期52-55,共4页Avionics Technology

摘　　要：传统航空电子全双工交换式以太网(AFDX)带宽为10 Mbit/s或100 Mbit/s。为满足机载网络对带宽增长的需求,必须进行千兆级AFDX的研究。AFDX端系统是AFDX网络的重要组成部分,为航空电子子系统接入AFDX网络提供了接口,保证航空电子子系统之间进行安全可靠的数据交换。着重研究了千兆级AFDX端系统,给出了基于现场可编程门阵列(FPGA)的千兆级AFDX端系统的设计。The bandwidth of traditional AFDX is 10 Mbit/s or 100 Mbit/s. In order to meet the requirement for bandwidth growth in airborne networks, gigabit AFDX study is necessary. AFDX end system is an important part of AFDX network. It provides avionics subsystem with an interface into AFDX network, ensuring safe and reliable data exchange between avionics subsystems. The research focuses on gigabit AFDX end and provides a solution of gigabit AFDX end system based on FPGA.

关 键 词：千兆比特 航空电子全双工交换式以太网(AFDX) AFDX端系统 现场可编程门阵列(FPGA) 

分 类 号：TP393.02[自动化与计算机技术—计算机应用技术]