基于HDMI2.0的加解扰器设计  

A Design of Scrambler and Descrambler based on HDMI2.0

作　　者：魏国 Wei Guo(Lontium Semiconductor Corporation, Hefei 230001, Chin)

机构地区：[1]龙迅半导体(合肥)股份有限公司,安徽合肥230001

出　　处：《电子技术（上海）》2018年第3期52-54,9,共4页Electronic Technology

摘　　要：分析了HDMI2.0版标准的加解扰算法,使用硬件描述语言Verilog HDL设计了加解扰器电路,选用FPGA开发平台进行了原型验证。验证结果表明,该设计正确实现了加解扰器的功能,符合HDMI2.0版标准的要求,可应用于系统设计中。Based on the analysis of HDMI2.0 specification, the circuit of scrambler and descrambler was designed with the hardware description language, and the prototype verification was implemented on the FPGA platform. The verification results show that the design can realized the functions of scrambler and descrambler and met the requirements of HDMI2.0 specification. It could be applied to system design.

关 键 词：高清晰度多媒体接口 加扰器 解扰器 现场可编程门阵列 

分 类 号：TP334.7[自动化与计算机技术—计算机系统结构]