Design and simulation of nanoscale double-gate TFET/tunnel CNTFET  

作　　者：Shashi Bala Mamta Khosla 

机构地区：[1]Department of Electronic and Communication Engineering, Dr B R Ambedkar Natrional Institute of Technology, Jalandhar-144011, India

出　　处：《Journal of Semiconductors》2018年第4期34-38,共5页半导体学报（英文版）

摘　　要：A double-gate tunnel field-effect transistor （DG tunnel FET） has been designed and investigated for various channel materials such as silicon （Si）, gallium arsenide （GaAs）, alminium gallium arsenide （A1xGa1-xAs） and CNT using a nano ViDES Device and TCAD SILVACO ATLAS simulator. The proposed devices are com- pared on the basis of inverse subthreshold slope （SS）, ION/IoFF current ratio and leakage current. Using Si as the channel material limits the property to reduce leakage current with scaling of channel, whereas the A1xGa1-xAs based DG tunnel FET provides a better ION/IOFF current ratio （2.51 × 10^6） as compared to other devices keeping the leakage current within permissible limits. The performed silmulation of the CNT based channel in the double-gate tunnel field-effect transistor using the nano ViDES shows better performace for a sub-threshold slope of 29.4 mV/dec as the channel is scaled down. The proposed work shows the potential of the CNT channel based DG tunnel FET as a futuristic device for better switching and high retention time, which makes it suitable for memory based circuits.A double-gate tunnel field-effect transistor （DG tunnel FET） has been designed and investigated for various channel materials such as silicon （Si）, gallium arsenide （GaAs）, alminium gallium arsenide （A1xGa1-xAs） and CNT using a nano ViDES Device and TCAD SILVACO ATLAS simulator. The proposed devices are com- pared on the basis of inverse subthreshold slope （SS）, ION/IoFF current ratio and leakage current. Using Si as the channel material limits the property to reduce leakage current with scaling of channel, whereas the A1xGa1-xAs based DG tunnel FET provides a better ION/IOFF current ratio （2.51 × 10^6） as compared to other devices keeping the leakage current within permissible limits. The performed silmulation of the CNT based channel in the double-gate tunnel field-effect transistor using the nano ViDES shows better performace for a sub-threshold slope of 29.4 mV/dec as the channel is scaled down. The proposed work shows the potential of the CNT channel based DG tunnel FET as a futuristic device for better switching and high retention time, which makes it suitable for memory based circuits.

关 键 词：band-to-band tunneling （BTBT） double gate （DG） silicon （Si） gallium arsenide （GaAs） aluminum gallium arsenide （AlxGa1 xAs） tunnel field effect transistor （FET） carbon nanotube （CNT） 

分 类 号：TN386[电子电信—物理电子学]