基于高速接口的SSD存储控制电路设计  

Design Of SSD Storage Control Circuit Based On High-speed Inerface

作　　者：沈贵元 王志浩[1,2] SHEN Gui-yuan;WANG Zhi-hao(China Communicalions System Co. Ltd. Hebei Branch, Shijiazhuang 050081, China;The 54th Research Institute of CETC, Shijiazhuang 050081, China)

机构地区：[1]中华通信系统有限责任公司河北分公司,河北石家庄050081 [2]中国电子科技集团公司第五十四研究所,河北石家庄050081

出　　处：《中国集成电路》2018年第3期22-24,38,共4页China lntegrated Circuit

摘　　要：针对目前固态硬盘主控国产化自主可控的需求,设计了一款采用PCI E接口的数据存储控制电路。该方案与SATA 2.0接口相比,采用了PCI E2.0×2的形式,其读写速度有了明显提高。在主控芯片中对固态硬盘的可靠性采取了众多策略,大大延长了NAND FLASH的使用寿命,安全性方面采用国密SM3、SM4和AES256进行加密,同时使用闪存阵列管理使得多通道可以并行进行,数据销毁上可以选择智能销毁和物理销毁两种方式,在紧急情况下最大限度的保证了用户信息的安全。For the current solid-state hard drive master control of the domestic control of the demand, we design a PCIe interface data storage control circuit. The program compared with the SATA 2.0 interface, using the form of PCIE2.0 × 2, the read and write speed has been significantly improved. In the master chip on the solid-state hard drive reliability using a number of strategies, greatly extending the NAND FLASH life, using dense SM3,SM4 and AES256 encryption in security aspects, using flash memory array management technology allows multi-channel can run in parallel, data destruction can choose intelligent destruction and physical destruction in two ways, in the event of an emergency It） ensure maximum user information security.

关 键 词：固态硬盘 PCIE AES256 闪存阵列管理 

分 类 号：TN402[电子电信—微电子学与固体电子学]