一种基于0.18μm CMOS工艺的电荷泵锁相环  

A 0.18μm CMOS Charge Pump Phase-Locked Loop

作　　者：葛彬杰 李琰[1] 俞航[1] 冯晓星 GE Binjie;LI Yan;YU Hang;FENG Xiaoxing(College of Computer Science ＆ Software Engineering, Shenzhen University, Shenzhen, Guangdong 518060, P. R. China)

机构地区：[1]深圳大学计算机与软件学院,广东深圳518060

出　　处：《微电子学》2018年第2期211-215,共5页Microelectronics

基　　金：国家自然科学基金资助项目(61471245;U1201256);广东省协同创新基金资助项目(2014B090901031);深圳产业发展基金资助项目(JCYJ20160308095019383;JSGG20150529160945187)

摘　　要：基于SMIC 0.18μm CMOS工艺,设计了一种锁定频率范围为36~96MHz的电荷泵锁相环。通过压控振荡器控制电压Vtune的反馈对输出电流进行动态调整,降低了电荷泵充放电流失配和漏电电流,减小了输出时钟的参考杂散。采用电压缓冲器作为VCO控制电压的输入,隔离了电荷泵开关切换产生的高频噪声,改善了输出信号的频谱纯度。测试结果表明,该锁相环的工作电流为170μA,工作电压最低为1.5V,芯片面积为0.04mm^2,适用于低功耗、低成本应用领域。A charge pump phase-locked loop with a locking frequency range of 36~96 MHz was designed in SMIC 0.18μm CMOS process.A voltage feedback of VCO’s control voltage Vtune was employed to dynamically adjust the output current,which had reduced the charging/discharging mismatch and leakage currents in charge pump,and had reduced the reference spur of PLL output.In the design of VCO,the input of VCO’s control voltage used a voltage buffer to isolate the high frequency noise generated by the switching of charge pump,thus improved the spectral purity of the output signal.The proposed circuit was taped out.Tested results showed that the phaselocked loop’s supply current was 170μA.It could work well at a power voltage as low as 1.5 V.The chip area was only 0.04 mm^2.It was suitable for the low power and low cost applications.

关 键 词：锁相环 环形振荡器 电荷泵 

分 类 号：TN432[电子电信—微电子学与固体电子学]