一种4 M-Pixel/s 4通道X射线CCD读出电路  

A 4 M-Pixel/s 4-Channel X-ray CCD Readout Circuit

作　　者：余茜 王克柔 易婷[1] 陆波[2] 陈勇[2] 洪志良[1] YU Qian;WANG Kerou;YI Ting;LU Bo;CHEN Yong;HONG Zhiliang(State Key Lab of ASIC ＆ System, Fudan University, Shanghai 201203, China;Key Laboratory of Particle Astrophysics, Institute of High Energy Physics, Chinese Academy of Sciences, Beijing 100049, China)

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海201203 [2]中科院高能物理研究所,北京100049

出　　处：《复旦学报（自然科学版）》2018年第2期243-249,共7页Journal of Fudan University：Natural Science

摘　　要：本文设计了一种4 M-pixel/s 4通道X射线CCD读出电路.为加快读出速度,采用相同的4个通道并行处理CCD信号,每通道由2个3阶3位增量型ΣΔ模数转换器(I-ΣΔADC)交替采样CCD信号进行量化.在调制器结构中引入环路延时迁移(SLD)缓解紧张的时序.设计实例采用0.35μm 2P4M CMOS工艺实现,芯片工作在3.3V电源电压和64MHz时钟频率下,设计获得前端电路折算到输入的等效积分噪声为13.53μV,积分非线性为0.009 6%,功耗为1.35W.This paper designs a 4 M-pixel/s 4-channel X-ray CCD readout circuit.In each channel,there are two modulators work alternatively to speed up the readout rate.Using modulator structure containing shifted loop delay（SLD）makes it easier to realize the required conversion speed.In order to achieve the required data processing speed and obtain the smaller filter area,the structure of the down sampling filter is carefully optimized.The 4-channel X-ray CCD readout system based on the incrementalΣΔconverter is implemented using the 2 P4 M0.35μm process.The circuit works under supply voltage of 3.3 Vand clock frequency of 64 MHz.The post-simulation results show that its equivalent input-referred noise is 13.53μV and the integral nonlinearity is 0.009 6%.The whole system＇s power consumption is 1.35 W.

关 键 词：电荷耦合器件读出系统 增量型ΣΔ调制器 环路延时迁移 

分 类 号：TN4[电子电信—微电子学与固体电子学]