应用DSP与CPLD实现24脉波低频电源触发电路  

Application of DSP & CPLD to achieve 24 pulse low frequency power trigger circuit

作　　者：王辉[1] 李培培[1] 李宏[1] 

机构地区：[1]西安石油大学,陕西西安710065

出　　处：《信息记录材料》2018年第7期69-71,共3页Information Recording Materials

摘　　要：为解决大功率低频电源在实际应用过程中谐波大、多路触发、晶闸管同时导通的一致性等问题,设计了一种基于DSP与CPLD相结合的数字控制触发系统。该系统以高速DSP为核心通过同步信号来产生初始的触发脉冲,应用CPLD实现脉冲分配和工作状态监控,具有相序自适应、缺相保护、脉宽调制等特点。较好的结合了DSP的智能特性和CPLD所具有的良好性能,提高了系统的可控性、可靠性、实时性。In order to solve the problems of large harmonics, multiple triggering and consistency of thyristor conduction at the same time during the practical application of high power low frequency power, a digital control triggering system based on DSP＆CPLD is designed. The system uses high-speed DSP as the core to generate the initial trigger pulse by synchronizing signal, and uses CPLD to realize the pulse distribution and working status monitoring. It has the characteristics of phase sequence adaptation, phase loss protection and pulse width modulation, combination of the DSP＇s intelligent features and CPLD has good performance, improve the system＇s controllability, reliability, real-time.

关 键 词：低频电源 DSP&CPLD 触发脉冲 

分 类 号：TN86[电子电信—信息与通信工程]