一种应用于CMOS图像传感器的流水线模数转换器设计  

Design of pipeline analog digital converter used for CMOS image sensors

作　　者：陈鸣 陈杰[1,2] 肖璟博 CHEN Ming;CHEN Jie;XIAO Jing- bo(Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;School of Microelectronics University of Chinese Academy of Sciences, Beijing 100029, China)

机构地区：[1]中国科学院微电子研究所,北京100029 [2]中国科学院大学微电子学院,北京100029

出　　处：《吉林大学学报（工学版）》2018年第3期968-976,共9页Journal of Jilin University:Engineering and Technology Edition

基　　金："973"国家重点基础研究发展项目(2015CB352103)

摘　　要：设计了一种应用于CMOS图像传感器中的低功耗流水线模数转换器(ADC),并采用逐次逼近寄存器(SAR)ADC辅助流水线架构,提出了一种新型全差分环形放大器。与传统的跨导运算放大器(OTA)相比,所提出的全差分环形放大器能效更高。本文采用0.18μm1P5M工艺完成电路设计及版图布局,当输入频率为19.94 MHz的正弦信号时,仿真显示ADC的信号噪声失真比(SNDR)为57.8dB,无杂散动态范围(SFDR)为64.9dB,最大微分非线性(DNL)为+0.58LSB/-0.33LSB,最大积分非线性(INL)为+0.55LSB/-0.57LSB。整个ADC功耗为3.78mW。This paper presents a low power pipeline Analog-to-Digital Converter（ADC）used in CMOS image sensor.We propose a new fully differential ring amplifier,and employ a SAR ADC to assist the pipeline architecture.Comparing with conventional Operational Transconductance Amplifier（OTA）,the proposed amplifier has higher energy-efficiency.This design is implemented in 0.18μm 1 P5 M1.8 V/3.3 Vprocess.The post-simulation results indicate that it can achieve a maximum differential nonlinearity of＋0.58 LSB/-0.33 LSB,a maximum integral nonlinearity of ＋0.55 LSB/-0.57 LSB,Spurious-Free Dynamic Range（SFDR）of 64.9 dB and Signal-to-Noise and Distortion Ratio（SNDR）of 57.8 dB for a 19.94 MHz input at sampling rate.The total power dissipation of ADC core is 3.78 mW,the FoM of ADC is 148 fJ/conv-step.

关 键 词：半导体技术 CMOS图像传感器 流水线模数转换器 环形放大器 逐次逼近寄存器 

分 类 号：TN43[电子电信—微电子学与固体电子学]