探测器图像直方图均衡化算法的FPGA优化设计  

Optimized Design of Histogram Equalization Algorithm for Detector Image Based on FPGA

作　　者：齐建玲 冉迪 赵姝雅 段晓东 Qi Jianling;Ran Di;Zhao Shuya;Duan Xiaodong(School of Electronic and Control Engineering, North China Institute of Aerospace Engineering, Langfang065000, Chin)

机构地区：[1]北华航天工业学院电子与控制工程学院,河北廊坊065000

出　　处：《北华航天工业学院学报》2018年第3期1-4,共4页Journal of North China Institute of Aerospace Engineering

基　　金：北华航天工业学院重点项目(KYPT-2014-01)

摘　　要：针对探测器的数据采集方式,通过利用现场可编程门阵列(FPGA)的并行处理能力,依据"面积换取速度"的原则,对直方图均衡化算法进行FPGA优化设计。通过Model Sim和MATLAB仿真实验,验证了优化设计算法的正确性,并将处理速度提升了一倍,同时简化了逻辑结构和外部资源的使用。Based on the data acquisition mode of the detector and the parallel processing ability in field programmable gate array （FPGA）, with the ＂area for speed＂ principle, the optimization design of histogram equalization algorithm FPGA is carried out. Through the simulation experiment of ModelSim and MATLAB, the correctness of the optimal design algorithm is verified, the processing speed is doubled meanwhile the logic structure and external resources are simplified.

关 键 词：直方图均衡 并行处理 现场可编程门阵列 

分 类 号：TN911.1[电子电信—通信与信息系统]