用于反熔丝FPGA的多标准IO接口电路  

A Multi-Standard IO Interface Circuit Applied in Anti-Fuse FPGA

作　　者：王雪萍 张国华[1,2] 曹靓[2] WANG Xueping;ZHANG Guohua;CAO Liang(School of Internet of Things Engineering, Jiangnan University, Wuxi, Jiangsu 214122, P. R. China;No. 58 Research Institute, China Electronics Technology Groap Corporation, Wuxi , Jiangsu 214035, P. R. China)

机构地区：[1]江南大学物联网工程学院,江苏无锡214122 [2]中国电子科技集团公司第五十八研究所,江苏无锡214035

出　　处：《微电子学》2018年第3期381-385,共5页Microelectronics

摘　　要：针对高可靠性领域和复杂环境对大规模反熔丝FPGA器件的迫切需求,设计了一种新的用于反熔丝FPGA的可动态配置IO接口电路。该IO接口电路具有宽的输入输出电压范围,能实现多驱动调节,支持一系列不同电平模式。通过对反熔丝单元进行编程配置,该IO接口电路可兼容多种IO标准,内核电压为2.5V,端口电压可在3.3V与5V之间转换。仿真与测试结果表明,该IO接口电路满足设计要求,接口速度优于国外同类产品。A new dynamically reconfigurable IO circuit for anti-fuse FPGA was designed to meet the requirements of large-scale anti-fuse FPGA devices in high reliability and complex environment.The IO circuit featured a wide range of input and output voltages.It achieved multi-drive adjustment,and could support a series of different voltage modes.The proposed circuit could be compatible with multiple IO standards,having achieved a core voltage of 2.5 Vand a port voltage of 3.3 V/5 V which was converted through the programmable configuration of anti-fuse unit.The simulation and tested results showed that the design of the IO circuit was effective and its interface speed was superior to the foreign similar products.

关 键 词：多标准 IO接口 反熔丝 现场可编程门阵列 

分 类 号：TN492[电子电信—微电子学与固体电子学]