用于SAR ADC的片上多模式基准电压产生电路的设计  

Design of integrated multi-mode reference voltage generator for SAR ADC

作　　者：侯佳力 胡毅 何洋[1,2,3] 王小曼 杨小坤[1,2,3] Hou Jiali;Hu Yi;He Yang;Wang Xiaoman;Yang Xiaokun(Beijing Smart-Chip Microelectronics Technology Co.,Ltd.,Beijing 100192,China;State Grid Key Laboratory of Power Industrial Chip Design and Analysis Technology,Beijing 100192,China;Beijing Engineering Research Center of High-reliability IC with Power Industrial Grade,Beijing 100192,China)

机构地区：[1]北京智芯微电子科技有限公司,北京100192 [2]国家电网公司重点实验室电力芯片设计分析实验室,北京100192 [3]北京市电力高可靠性集成电路设计工程技术研究中心,北京100192

出　　处：《电子技术应用》2018年第7期34-37,41,共5页Application of Electronic Technique

摘　　要：针对工业物联网等应用场景中ADC的供电电压范围宽、功耗要求苛刻等问题,提出了一种配置灵活、低功耗、低噪声的片上基准电压产生电路,为ADC提供与电源无关满量程电压。该电路在电源电压为2.65 V^3.6 V时提供2.5 V参考电压,电源电压为2.2 V^3.6 V时提供1.5 V的参考电压。该电路可以配置成片外电容模式,关闭缓冲器电路,降低整体的功率;还可以配置成内部缓冲器模式,减小基准电压产生电路的建立时间,从而降低ADC单次采样消耗的能量。芯片测试结果表明,该方案能够满足ADC在各种应用条件下的精度和速度需求。Aiming at the problems of complex supply voltage and high sensitivity of power in ADC for the industrial Internet of Things, this paper presents a flexible, low power and low noise reference voltage generator for the SAR ADC to obtain good PSRR and a stable supply-independent full-scale range. The 2. 5 V or 1. 5 V is available based on the different range of supply voltage（ 2. 65 V - 3. 6 V or 2. 2 V - 3. 6 V）. This circuit support off-chip capacitor to provide transient current for the ADC to avoid the power-hungry integrated buffer in series sampling mode. An energy-efficient mode which uses integrated buffer rather than off-chip capacitor can be configured to obtain short setting time to save energy during each one-shot sample. Testing result shows the cir-cuit can save power/energy with no loss in ADC performance.

关 键 词：ADC 参考电压产生电路 功率 能量 

分 类 号：TN752[电子电信—电路与系统]