一种基于Cache机制的低功耗Flash控制器设计  

A low power flash controller design based on cache mechanism

作　　者：连汉丽 陈亚南 焦继业 雷水艳 LIAN Hanli;CHEN Yanan;JIAO Jiye;LEI Shuiyan(1.School of Science,Xi＇an University of Posts and Telecommunications;School of Electronic Engineering,Xi＇an University of Posts and Telecommunications,Xi＇an 71012)

机构地区：[1]西安邮电大学理学院,陕西西安710121 [2]西安邮电大学电子工程学院,陕西西安710121

出　　处：《西安邮电大学学报》2018年第1期70-73,共4页Journal of Xi’an University of Posts and Telecommunications

基　　金：陕西省教育厅专项科研计划资助项目(15JK1664)

摘　　要：为降低消费类电子产品中嵌入式Flash的读取功耗,设计了一种基于Cache机制的Flash控制器。将Cache机制引入Flash控制器中,运用控制变量的方法,分析了容量、关联度和行长与Cache命中率、微控制器功耗的关系,给出了Cache相应的参数。结果表明,容量选择1024字节、关联度和行长选择4字/1路模式时,Cache具有较高命中率,微控制器功耗的优化效果最为明显。In order to solve the problem of high power consumption of embedded Flash read in consumer electronics,a Flash controller based on Cache mechanism was designed.Introducing a Cache mechanism in Flash controller and Using the method of controlling variables,effects of capacity,correlation,and line-words on the Cache hit rate and microcontroller power consumption were studied and design the Cache parameters.The results show that Cache has a higher hit rate when the capacity is 1024 byte and the parameter of correlation and line-word is in the mode of 4 words/1 way.Under the same conditions,the optimization effect of the power consumption of the microcontroller is also most obvious.

关 键 词：嵌入式FLASH CACHE 低功耗 命中率 

分 类 号：TP3[自动化与计算机技术—计算机科学与技术]