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作 者:黄涛[1] 欧阳宏俊 邵振海[1] 陈志璋 HUANG Tao1, OUYANG Hong-jun2, SHAO Zhen-hai1, CHEN Zhi-zhang1(1. School of Electronic Science and Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China; 2. Chengdu No. 12 Middle School, Chengdu 611731, Chin)
机构地区:[1]电子科技大学电子科学与工程学院,成都611731 [2]四川省成都市第十二中学,成都611731
出 处:《微波学报》2018年第4期65-70,共6页Journal of Microwaves
摘 要:传统基于锁相环(PLL)实现带宽信号输出的频率合成方案,常常为了获得高输出频率而降低频率分辨率和缩短跳频时间。相较而言,基于直接数字频率合成器(DDS)实现带宽信号输出的频率合成方案,其频率分辨率更高,跳频时间更快。然而,DDS输出频率低,须经多次混频或倍频操作以提升输出频率,对频率源中的滤波器设计造成极大压力,并且这种压力随着频率源输出频率的升高而不断上升。对此,基于高性能、小型化无源滤波器的设计能力,实现了基于DDS变频的34-35 GHz捷变频、高频率分辨率频率源。实验结果表明,其工作相位噪声优于-85 dBc/Hz@1kHz,杂散和谐波抑制优于45 dBc,频率分辨率达到1.86 Hz,跳频时间最快4 ns。The conventional frequency synthesis for frequency bandwidth output based on phase locked loop( PLL)often sacrifices the frequency resolution and frequency hopping time in order to obtain high output frequency. Comparatively,frequency synthesis for frequency bandwidth output based on direct digital frequency synthesizer( DDS) can perform higher frequency resolution and shorter frequency hopping time. However,since the output frequency of DDS is typically low,multiple frequency mixing or doubling operations are required to increase the output frequency,which will bring extreme burden on the filter design in the frequency synthesizer. Particularly,such burden will be heavily increased with the increasing of output frequency. Based on the design capability of high-performance and miniaturized passive filters and DDS technology,a 34 ~ 35 GHz frequency synthesizer with agile frequency tunability and high frequency resolution is reported in this paper. Measured results show that it achieves phase noise better than-85 dBc/Hz @ 1 kHz,spur and harmonic suppression better than45 dBc,frequency resolution better than 1.86 Hz and the minimum frequency hopping time of 4 ns.
关 键 词:直接数字频率合成器 KA波段 滤波器 高性能 小型化
分 类 号:TN74[电子电信—电路与系统]
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