基于CPLD的高精度CCD电气设计  

Electrical Design of High-precision CCD Based on CPLD

作　　者：吴延军[1] WU Yan-jun(PLA 91550,Dalian Liaoning 116023)

机构地区：[1]91550部队,辽宁大连116023

出　　处：《数字技术与应用》2018年第7期152-155,共4页Digital Technology & Application

摘　　要：文章针对传统采用组合逻辑电路驱动的CCD器件更换或升级后,需要重新进行电路设计的缺点,设计了一种采用CPLD代替组合逻辑电路的驱动方法。该方法利用CPLD与控制外端结合,通过外部控制端实现4档驱动主频切换,采用自顶向下的混合设计方法,顶层采用原理图设计基本架构,底层采用硬件描述语言设计时序。实验结果表明,该方法电路集成度较高、调试方便、输出信号稳定、受干扰小,可满足多种用户的需要,对基于线性CCD和面阵CCD的高速精确测量具有一定参考价值。To solve the problem which the circuit is redesigned after the CCD devices driven by combinational logic are changed, the driven method of CPLD is designed. Combined with the external port, Frequency switching driven by 4-tap external control is implemented. With the topdown design method adopted, the basic framework is designed of schematic circuit diagram, while the time sequence is designed of hardware description language. The experimental results show that this method has the characteristics of convenient debugging, simple circuit structure, high integration,stable output signal and anti-interference, which can satisfy multiple recommendations and make the measurement of CCD faster and more accurately obviously.

关 键 词：CCD驱动 组合逻辑电路 CPLD 

分 类 号：TP391.4[自动化与计算机技术—计算机应用技术]