可逆双边沿触发器的设计  

Design of reversible double-edge flip-flops

作　　者：张莹 王伦耀[1] 夏银水[1] ZHANG Ying;WANG Lun-yao;XIA Yin-shui(Faculty of Electrical Engineering and Computer Science,Ningbo University,Ningbo 315211,China)

机构地区：[1]宁波大学信息科学与工程学院,浙江宁波315211

出　　处：《宁波大学学报（理工版）》2018年第5期45-50,共6页Journal of Ningbo University：Natural Science and Engineering Edition

基　　金：国家自然科学基金(61471211)

摘　　要：提出了一种可逆双边沿D触发器的设计方法,该方法利用Feynman可逆逻辑门的信号复制特性,实现可逆D锁存器的设计.然后利用双边沿触发器原理,结合D可逆锁存器以及Fredkin和Modified Fredkin可逆逻辑门的数据选择功能,实现可逆双边沿触发器的设计.同时,利用Verilog硬件描述语言对提出的可逆双边沿D触发器的功能进行了描述.与已有的可逆触发器相比,在相同数据传输速率下,本文设计的双边沿触发器具有结构简单、垃圾位和常量输入少、量子代价更低的特点.Using the reversible D-latch,a design of the reversible double-edge flip-flops based on the principle of double-edge flip-flop is proposed.The reversible D-latch is designed based on taking advantage of the signal replication properties of the Feynman reversible logic gate.The Fredkin reversible logic gate is employed to select and output the data stored in the D-latch in the design.Furthermore,the Verilog hardware description language is used to model the behaviors of the reversible logic gates,and to verify the function of the proposed reversible double-edge D flip-flops.Compared with the existing reversible flip-flops,the proposed design has a more compact structure,less ancilla bits,and lower quantum cost under the same data transmission rate.

关 键 词：可逆逻辑 双边沿触发 D锁存器 量子代价 

分 类 号：TP302.2[自动化与计算机技术—计算机系统结构]