多速率信号处理系统设计与实现  

Design and implementation of multirate signal processing system

作　　者：谢海霞 孙志雄 XIE Hai-xia;SUN Zhi-xiong(School of Marine Information Engineering,Tropical Ocean University of Hainan,Sanya 572022,China)

机构地区：[1]海南热带海洋学院海洋信息工程学院,海南三亚572022

出　　处：《电子设计工程》2018年第18期132-135,139,共5页Electronic Design Engineering

基　　金：2016海南省自然科学基金项目(20166224)

摘　　要：多速率信号处理通过内插和抽取方法来变化系统中不同节点处的信号速率。分析了在抽取和内插中采用的抗混叠滤波器如CIC,HB,多相滤波器组等,提出一种128倍多级抽取器设计方案,通过在MATLAB中建模,并编写verilog HDL代码,在ModelSim中进行仿真,仿真结果验证了这一结构的合理性。Multirate signal processing varies the signal rate at different nodes in the system by interpolation and decimation methods. An anti-aliasing filter such as CIC,HB,polyphase filter bank and so on used in decimation and interpolation is analyzed. A 128 times multistage decimator design is proposed. By modeling in MATLAB and writing verilog HDL Code,simulation in ModelSim,the simulation results verify the rationality of this structure.

关 键 词：CIC HB 多相滤波器组 MATLAB 

分 类 号：TN911.72[电子电信—通信与信息系统]