一种低噪声高纹波抑制比的LDO设计  

Design of a Low Noise High PSR Low Dropout Regulator

作　　者：黄松 姜洪雨[1] 刘智[1] 耿增建[1] HUANG Song;JIANG Hong-yu;LIU Zhi;GENG Zeng-jian(Xi＇an Microelectronics Technology Institute,Xi ~ an 710119,China)

机构地区：[1]西安微电子技术研究所,陕西西安710119

出　　处：《微电子学与计算机》2018年第10期89-92,98,共5页Microelectronics & Computer

摘　　要：提出了一种低噪声高电源纹波抑制比(PSR)的低压差线性稳压器(LDO).该低压差线性稳压器通过提高带隙基准和误差放大器的噪声抑制性能以及PSR性能以达到提高LDO性能的目的.在0.6μm BiCMOS工艺下进行了流片验证,测试结果表明,当负载电流为100mA时,100Hz电源纹波抑制比为75dB;10kHz时电源纹波抑制比为72dB.输出噪声电压(100Hz^100KHz)为15μVRMS.A low dropout regulator （LDO） with low output noise voltage and high power supply ripple rejection ratio （PSR） is described. The LI）O improves the ability of power supply ripple rejection and output noise voltage suppression by improving power supply ripple rejection ratio and output noise voltage suppression of the band-gap reference and the differential amplifier. This approach is tested in 0. 6μm BiCMOS process. The results show that the PSR at 100 Hz is 75 dB and at 10 kHz is 72 dB, when the load current is 100 mA. The output noise voltage is 15 μVRMs（100 Hz to 100 kHz）.

关 键 词：低压差线性稳压器 噪声 电源纹波抑制比 

分 类 号：TN433[电子电信—微电子学与固体电子学]