基于FPGA实现千兆以太网二层交换  

Realization of Gigabit Ethernet Layer 2 Switching based on FPGA

作　　者：贾婷 胡斌 刘台 JIA Ting;HU Bin;LIU Tai(Wuhan Zhongyuan Electronic Group Co.Ltd.,Wuhan Hubei 430205,China)

机构地区：[1]武汉中原电子集团有限公司,湖北武汉430205

出　　处：《通信技术》2018年第11期2758-2764,共7页Communications Technology

摘　　要：千兆以太网(Gigabit Ethernet)交换芯片是多种通信设备中不可或缺的核心芯片,目前应用广泛的是Broadcom公司的交换芯片。然而,随着国产化对国防通信和网络安全保障重要性的提升,核心技术的自主可控成为其重要一环。因此,基于Xilinx K7型号的FPGA芯片,采用VHDL硬件描述语言,自主研发了4端口的可管理千兆以太网二层交换芯片,并在相应的硬件平台上进行了功能验证和性能测试。Gigabit Ethernet switching chips are indispensable core chips in a variety of communication devices. Currently, the widely-used are BroadcomJs switching chips. However, with the increasing importance of localization for defense communication and network security, the autonomy and control of core technologies becomes an important link. Based on the Xilinx K7 model FPGA chip, and with the VHDL hardware description language, the 4-port manageable Gigabit Ethernet Layer 2 switching chip is independently developed, and the functional verification and performance testing also done on the corresponding hardware platform.

关 键 词：MAC帧 哈希算法 共享缓存 QoS优先级 流量控制 

分 类 号：TN919.21[电子电信—通信与信息系统]