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作 者:陈长兴[1] 赵隆冬[1] 侯建群[1] CHEN Chang-xing;ZHAO Long-dong;HOU Jian-qun(No.43 Research Institute of CETC,Hefei 230088,China)
机构地区:[1]中国电子科技集团公司第43研究所,合肥230088
出 处:《混合微电子技术》2017年第4期16-21,共6页Hybrid Microelectronics Technology
摘 要:目前,单机系统对采用厚膜工艺的高压大电流EMI滤波器的需求越来越迫切。对于采用厚膜工艺的高压大电流EMI滤波器,其设计应该主要从如下几方面考虑:1.电磁兼容性设计2.电路结构设计;3.共模和差模滤波的阻尼设计:4.高压大电流滤波器中电容和电感的设计;5.厚膜导带和成膜电阻设计;6.总体布局和热设计。本文以采用厚膜工艺的±100V/7AEMI滤波器设计为例进行说明,并通过插入损耗仿真和实测、极点测试以及电磁兼容试验进行性能验证。Currently the requirements of the single system on the high-voltage and high-current EMI filter by using thick film process are more urgent. For the design of high voltage and high current EMI filter using the thick film process, the following aspects mainly should be considered: 1. Design of EMC ;2. Design of the circuit configuration; 3. Damping design of common mode and differential mode filtering; 4.Desigu of the inductor and capacitor in high-voltage and high-current filter; 5. Design of resistors and conduction band by using the thick film process; 6. Overall layout and thermal design. In this paper, for example of ±100V / 7A EMI filter by using thick film process to explain, and to verify the performance through the simulation and actual measurement of the insertion loss, pole test and EMC test.
关 键 词:厚膜工艺 高压大电流EMI滤波器 阻尼设计 插入损耗
分 类 号:TN713.8[电子电信—电路与系统]
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