Delta L损耗测试技术研究  

Study on the delta L methodology for PCB loss characterization

作　　者：程柳军 李艳国 陈蓓 Cheng Liujun;Li Yanguo;Chen Bei

机构地区：[1]广州兴森快捷电路科技有限公司,广东广州510663 [2]深圳市兴森快捷电路科技股份有限公司,广东深圳518057

出　　处：《印制电路信息》2018年第A02期411-419,共9页Printed Circuit Information

摘　　要：传输线损耗性能测试是高速PCB信号完整性的重要表征手段．文章先介绍了业内应用较多的几种PCB损耗测试方法的原理及应用场景．而后研究了长短线长度、数量、残桩长度等因素对Delta L测试结果的影响．并进一步分析对比了业内常用的SET2DIL方法、TRL方法与Delta L方法的精度差异。研究表明，Delta L方法能有效去除过孔效应的影响。在12．89GHz时的测试精度与TRL方法相当，是一种操作简便、耗时短、精度高的损耗管控方法。The insertion loss of transmission line is an important indicator for the signal integrity of high-speed PCB. This paper provides overview of several PCB loss test methods which are widely used in the industry, and then the influence of line length, number of lines, stub length on the insertion loss of Delta L method were investigated. Finally, the accuracy difference between SET2DIL, TRL and Delta L method were analyzed. The results showed that Delta-L could remove the via effect efficiently and characterize PCB electrical performance accurately.

关 键 词：高速电路板 插入损耗 去嵌入 DELTA L 信号完整性 

分 类 号：TN41[电子电信—微电子学与固体电子学]