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作 者:杨惠[1] 陈一骄[1] 李韬[1] 李世星[1] 戴幻尧 YANG Hui;CHEN Yijiao;LI Tao;LI Shixing;DAI Huanyao(College of Computer,National University of Defense Technology, Changsha 410073 , China;Luoyang Electronic Equipment Test Center, Luoyang 471003 , China)
机构地区:[1]国防科技大学计算机学院,湖南长沙410073 [2]中国洛阳电子装备试验中心,河南洛阳471003
出 处:《国防科技大学学报》2016年第5期26-31,共6页Journal of National University of Defense Technology
基 金:国家自然科学基金资助项目(612024823;61301236)
摘 要:基于通用多核架构的网络分组处理系统性能受到诸如分组IO开销高、多核共享内存及进程调度竞争大、页表缓冲表项失效率高等问题的困扰。为此提出一种基于通用多核网络分组处理系统、面向高速分组转发应用的线程亲和缓冲区硬件管理机制,并在网络专用协处理引擎上实现。该机制采用无中断的线程亲和调度策略,将包含控制信息与缓冲区地址信息的描述符和分组数据按照分组处理的线程号链式地对应加载在多个地址连续的共享缓冲区中。基于通用多核和现场可编程门阵列平台进行报文转发测试,实验结果表明,采用线程亲和缓冲区管理机制能使平均报文转发处理性能提升12.4%,有效地降低IO开销和TLB表项失效率。The packet processing performance of the general multi-core architecture is plagued by many factors, including high packet 10 cost,multi-core share memory and process scheduling competition, TLB entries failure rate, etc. Therefore, a TABM ( thread affinity for buffer management mechanism) based on multi-core network packet processing system, which is oriented to high-speed packet forwarding application was proposed and completed on network dedicated co-processing engine. The TABM adopts thread affinity scheduling strategy with no interrupt, sends each packet data and descriptor which contains control and buffer address information to several successive shared buffers according to the corresponding thread ID , and organizes the packets and descriptors which processed in the same thread in the form of a chain. The packet forwarding performance was tested on the basis of general multi-core and field-programmable gate array platform. The experimental data show that the average packet forwarding performance is promoted by about 12. 4% and the 10 cost and the TLB entries failure rate are reduced by adopting the TABM.
分 类 号:TP393[自动化与计算机技术—计算机应用技术]
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