针对FPGA的IDL-Verilog编译器的设计与实现  

Design and implementation of IDL-Verilog compiler for FPGA

作　　者：吴湛[1] 王玲[1] 吴宇[2] WU Zhan;WANG Ling;WU Yu(College of Electrical and Information Engineering,Hunan University,Changsha 410082,China;College of Electronic Science and Engineering,National University of Defense Technology,Changsha 410073,China)

机构地区：[1]湖南大学电气与信息工程学院,湖南长沙410082 [2]国防科学技术大学电子科学与工程学院,湖南长沙410073

出　　处：《现代电子技术》2017年第14期18-22,共5页Modern Electronics Technique

基　　金：国家自然科学基金资助项目(61372099;61302140)

摘　　要：软件通信体系结构规范(SCA)规定采用CORBA中间件来实现运行在不同处理器上的波形组件之间的相互通信,然而目前缺少能够有效支持FPGA上CORBA中间件的IDL编译器。为此设计实现了一种IDL-Verilog编译器,该编译器能够支持用户自定义的任意IDL文件,并根据FPGA波形组件功能需要,自动生成运行在FPGA上的ORB核心、FPGA组件框架代码,从而真正实现FPGA组件与GPP组件的统一CORBA通信。介绍IDL-Verilog编译器的整体结构,并对该编译器的设计与实现进行详细阐述,最后对编译器进行测试。结果表明,该编译器能够正确解析IDL文件,并实现从IDL到Verilog语言的映射,自动生成的一系列目标文件使FPGA真正具备CORBA通信能力。The software communications architecture(SCA)norm stipulates that the CORBA middleware should be used torealize intercommunication between the waveform components running in the different processors,but there is no IDL compilerwhich can support the CORBA middleware on FPGA effectively.Therefore,an IDL-Verilog compiler was designed,which cansupport any IDL files defined by users themselves,and generate the ORB core and FPGA component framework code runningon FPGA automatically according to the functional requirements of FPGA components,so as to realize the CORBA communication between FPGA components and GPP components.The whole structure of IDL-Verilog compiler is introduced.The designand implementation of the compiler are expounded in detail.Some tests for the compiler were carried out.The results show thatthe IDL?Verilog compiler can parse the IDL files correctly,implement the mapping from IDL to Verilog language,and generatethe target files automatically to make FPGA really have the ability of CORBA communication.

关 键 词：软件通信体系结构 CORBA FPGA IDL编译器 

分 类 号：TN915-34[电子电信—通信与信息系统] TP314[电子电信—信息与通信工程]