SATA 3.0物理层设计与FPGA实现  被引量:5

Design and implementation for physical layer of serial ATA revision 3.0 based on FPGA

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作  者:杨亚涛[1] 张松涛[1] 李子臣[1,2] 王培东[1] 曲鸣[1] YANG Yatao;ZHANG Songtao;LI Zichen;WANG Peidong;QU Ming(Beijing Electronic Science & Technology Institute, Beijing 100070, China;Beijing Institute of Graphic Communication, Beijing 102600, China)

机构地区:[1]北京电子科技学院,北京100070 [2]北京印刷学院,北京102600

出  处:《计算机工程与应用》2017年第20期38-42,共5页Computer Engineering and Applications

基  金:国家自然科学基金(No.61370188);中央高校基本科研业务费专项资金(No.2017XK01)

摘  要:SATA接口标准已成为数据存储和高速数据传输的重要应用之一,对SATA3.0接口标准的研究和实现已引起广泛关注。首先探究了带外信号、上电初始化和速率配置等关键技术,然后基于Virtex-5系列FPGA内置的RocketIO GTX收发器,设计了带外信号时序、初始化状态机等模块,实现了符合SATA标准3.0的物理层。与现有方案相比,该设计具有易扩展、可配置等特点。经仿真测试,传输速率接近6 Gb/s,相比现有设计有较大提升。Serial ATA interface standard has become one of the important applications of data storage and high-speed datatransmission.Research and implementation on it has caused extensive concern.The key techniques of out of band signals,link initialization and rate configuration have been researched firstly,then the modules of out of band signal time sequenceand initialization state machine are designed based on RocketIO GTX transceivers,which is built-in the FPGA of Virtex-5family.Moreover,the physical layer of serial ATA revision3.0has been implemented.Compared with existing designs,the scheme has a better performance in the expansibility and configurability.The simulation result shows that its transferrate has a great increasing,which works nearly at6Gb/s.

关 键 词:串行高级技术附件 物理层 带外信号 RocketIOGTX收发器 链路初始化 

分 类 号:TP391.9[自动化与计算机技术—计算机应用技术]

 

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