基于ADF4350的锁相环频率合成器设计与实现  

Design and Implementation of Phase-locked Loop Frequency Synthesizer based on ADF4350

作　　者：夏江林 邹传云[1] XIA Jiang-lin;ZOU Chuan-yun(School of Information Engineering,Southwest University of Technology and Science,Mianyang Sichuan 621010,China)

机构地区：[1]西南科技大学信息工程学院,四川绵阳621010

出　　处：《通信技术》2018年第3期734-740,共7页Communications Technology

基　　金：国家自然科学基金(No.61671393)~~

摘　　要：鉴于频率合成器对微型、分辨率和稳定度的高要求,设计了一种体积小、重量轻和高稳定度的频率合成器。ADF4350是PLL系统的核心组成部分,并集成了片上压控振荡器(VCO),便于设计产生1 GHz的频率合成器。首先,对频率合成器和环路滤波器的硬件电路原理进行详细描述和设计。其次,对电路的PLL锁定时间、噪声等重要指标进行详细分析。最后,通过实验证明了该频率合成器的稳定性、可靠性以及应用价值。In view of the high requirements for miniature,resolution and stability,a frequency synthesizer with small size,light weight and high stability is designed.ADF4350is the core component of the PLL system,being integrated with on-chip VCO(Voltage-Controlled Oscillator),could thus facilitate the design of a1GHz frequency synthesizer.Firstly,the hardware-circuit principle of the frequency synthesizer and the loop filter is described and designed in detail.Then,detailed analysis is done on the PLL locking time,noise and other important indicators of the circuit are analyzed closely.Finally,the stability,reliability,and application value of the frequency synthesizer are verified with experiments.

关 键 词：ADF4350 频率合成器 环路滤波器 PLL 

分 类 号：TN92[电子电信—通信与信息系统]