基于UVM的I^2S验证IP设计  

Design of a UVM-based I^2S verification IP

作　　者：倪伟 袁琳 王笑天 NI Wei;YUAN Lin;WANG Xiaotian(School of Electronic Science and Applied Physics,Hefei University of Technology,Hefei 230009,China)

机构地区：[1]合肥工业大学电子科学与应用物理学院,安徽合肥230009

出　　处：《合肥工业大学学报（自然科学版）》2018年第1期49-54,共6页Journal of Hefei University of Technology：Natural Science

基　　金：国家自然科学基金资助项目(61204024)

摘　　要：文章采用统一验证方法学(universal verification methodology,UVM)技术开发了符合I2S(inter-IC sound)接口协议的验证IP(intellectual property),并构建了自测试验证平台对其功能进行检验。自测试验证平台产生受约束的随机激励信号检查所实现的I2S协议,测试该验证IP的功能,并通过功能覆盖率来完善验证IP的设计。仿真结果表明,该验证IP可正确模拟I2S总线的数据通讯,功能覆盖率达到100%。An I2S(inter-IC sound)verification intellectual property(IP)is developed by using universal verification methodology(UVM),and a self-test verification platform is built to test its function.The self-test verification platform generates constrained random stimulus to verify the implementation of I2S protocol and test functions of this verification IP.The function coverage is utilized to improve the design of this verification IP.The simulation results show that this verification IP,with 100%of the ratio of function coverage,can simulate the data communication of I2S bus correctly.

关 键 词：统一验证方法学(UVM) SystemVerilog语言 I2S接口 验证IP 

分 类 号：TN47[电子电信—微电子学与固体电子学]