65nm CMOS可集成ps级窄脉冲驱动器  

A 65nm CMOS compositiveps level narrow pulse driver

作　　者：许超龙[1] 赖明澈[1] 罗章[1] 向阳[1] 庞征斌[1] XU Chao-long;LAI Ming-che;LUO Zhang;XIANG Yang;PANG Zheng-bin(College of Computer,National University of Defense Technology,Changsha 410073,China)

机构地区：[1]国防科技大学计算机学院,湖南长沙410073

出　　处：《计算机工程与科学》2018年第3期405-410,共6页Computer Engineering & Science

基　　金：国家863计划(2015AA015302)

摘　　要：光电集成工艺和高速光脉冲队列技术的发展使得新型光互连技术——光SerDes收发器得以提出。相比现有光互连技术,光SerDes技术具有更高速率、更低功耗和更高集成度的优点。但其对于驱动光开关产生长周期窄脉冲光信号的驱动电路的性能、工艺及集成度有了更高要求。提出了一种应用于光SerDes收发器的65nm CMOS工艺下的集成ps级窄脉冲驱动器。该驱动器可产生脉宽精确可调的长周期窄脉冲,可获得窄至13ps的脉冲输出,其工作电压范围宽达1.4~2.0V,时钟频率范围可由数KHz宽至25GHz。Depending on the breakthrough of single-chip opto-electrical integration and the advance of the optical pulse train generator technology,a new optical interconnect technology-optical serializer/de-serialier(SerDes)technology is proposed.Compared with traditional optical interconnect technology,optical SerDes technology is faster,lower power consumption and higher integration.The performance and integration requirement of driver circuit that drives the optical switch producing narrow optical pulse in a relative long cycle is more stringent.A 65nm CMOS integrated ps level narrow pulse driver used for optical SerDestransceiver is proposed.The driver drives optical switch producing optical pulse,which is as narrow as 13ps in SMIC 65nm CMOS library.The power voltage range is in 1.4:?2.0 V,and the clock frequency is from several KHz up to 25 GHz.

关 键 词：ps 65 nm CMOS 驱动器 光开关 光SerDes 

分 类 号：TP303[自动化与计算机技术—计算机系统结构]