基于FPGA的高性能卫星导航抗干扰处理器设计与实现  

High-performance Processor Design and Implementation for Anti-jamming of Satellite Navigation Based on FPGA

作　　者：马忠志 张荣兵 刘红 Ma Zhongzhi;Zhang Rongbing;Liu Hong(Beijing Research Institute of Telemetry,Beijing 100076,China)

机构地区：[1]北京遥测技术研究所,北京100076

出　　处：《遥测遥控》2018年第2期34-40,共7页Journal of Telemetry,Tracking and Command

基　　金：中国第二代卫星导航系统重大专项(GFZX03010402)

摘　　要：卫星导航接收机多采用阵列天线进行抗干扰处理。为提高阵列天线的抗干扰性能,利用FPGA设计并实现一个基于浮点复协方差矩阵求逆的高性能抗干扰处理器。通过选择合理的求逆方法和资源复用策略解决了算法高复杂度和FPGA有限资源之间的矛盾,利用较少的硬件资源获得了良好的权值计算精度和权值更新速度。仿真测试结果表明,处理器干扰抑制效果显著,可以有效提升卫星导航接收机的抗干扰能力。Satellite navigation receivers mostly use antenna array for anti-jamming.In this paper a high-performance processor is designed and implemented based on FPGA,which realizes the complex covariance matrix inverse with floating-point representation.The conflict between high-complexity algorithm and limited hardware resources is sloved by proper matrix inverse method and resources multiplex strategy,so that good performances of weight precision and update rate are achieved with less hardware resources.The simulation result shows that the processor can obviously suppress interference and effectively improve the anti-jamming ability of satellite navigation receiver.

关 键 词：卫星导航 抗干扰 复矩阵求逆 浮点数 

分 类 号：TN97[电子电信—信号与信息处理]