基于FPGA的千兆以太网接口应用研究与实现  

Applied research of Gigabit Ethernet interface and its implementation based on FPGA

作　　者：吴长瑞[1] 徐建清[1] 蒋景红[1] WU Changrui;XU Jianqing;JIANG Jinghong(Institute of Acoustics,Chinese Academy of Sciences,Beijing 100190,China)

机构地区：[1]中国科学院声学研究所,北京100190

出　　处：《现代电子技术》2018年第9期1-5,共5页Modern Electronics Technique

基　　金：国家自然科学基金(11304343)~~

摘　　要：为解决嵌入式领域中数据量大、速度高、实时性强等传输问题,提出FPGA和PHY芯片相结合的设计方案,用于实现UDP/IP协议。通过深入研究TCP/IP协议栈体系结构和工作原理,按照以太网的帧格式封包和解包,在FPGA中实现UDP/IP数据的正确发送和接收。在自主研发的硬件平台上验证了该方案的正确性和可靠性。由于使用FPGA实现UDP/IP协议,系统具有移植性高和易于集成等优点。In order to solve the transmission problems of large data amount,high speed and strong real-time performance of the embedded field,a design scheme combining FPGA and PHY chip is proposed to implement the UDP/IP protocol.The sys-tem architecture and working principle of TCP/IP protocol stack are studied deeply.According to the packed and unpacked frame format of Ethernet,the UDP/IP data is sent and received correctly in FPGA.The correctness and reliability of the scheme are verified on the autonomously-developed hardware platform.The system using FPGA to implement the UDP/IP protocol has the advantages of high portability and easy integration.

关 键 词：UDP/IP 协议栈 千兆以太网 现场可编程门阵列 帧格式 系统集成 

分 类 号：TN913-34[电子电信—通信与信息系统]