SoC系统功耗评估方法  

Power Consumption Evaluation of SoC System

作　　者：杨瑞瑞 唐伟文 YANG Rui-rui;TANG Wei-wen(Chengdu 30Javee Microelectronics Co.,Ltd.,Chengdu Sichuan 610041,China)

机构地区：[1]成都三零嘉微电子有限公司,四川成都610041

出　　处：《通信技术》2018年第9期2267-2270,共4页Communications Technology

摘　　要：随着SoC系统电路集成度越来越高,单位面积集成的门电路规模越来越大,终端设备、移动设备需求量不断递增,对芯片整体性能的要求已经由原来的面积和速度的权衡变成了面积、时序、功耗的综合考虑,且功耗所占的比重越来越大。因此,主要介绍在芯片研制过程中,在方案设计阶段、RTL代码设计阶段以及流片前签核阶段对功耗的评估计算方法,并根据芯片设计经验,阐述在不同阶段功耗评估可以达到的准确度和评估的主要目标。该功耗评估方法已成功应用于某款超低功耗安全专用芯片的研制,并且芯片的功耗完全满足预期指标要求。With higher and higher integration of SoC system circuits,the increasing size of integrated circuit blocks per unit area,and the increasing demand for terminal devices and mobile devices,the overall performance requirement for the chip changes from the original area and speed to the comprehensive consideration of area,timing and power consumption,and the proportion of power consumption becomes bigger and bigger.The assessment and calculation method of power consumption in the process of chip development,in the design phase of the program,and RTL code,and in the sign-off phase before the film release is described,including the main objectives for accuracy and calculation of power consumption assessment at different stages and based on chip design experience.The power-consumption estimation method is now successfully applied to the development of certain specific ultra-low power security chip,and experiment indicates that the power consumption of the chip could fully meet the requirement of the expected specifications.

关 键 词：SOC系统 芯片 低功耗 功耗评估 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]