SpaceWire高速总线节点控制器的设计与实现  

The design and implementation of SpaceWire high speed bus interface controller

作　　者：柳萌 安军社 史毅龙 江源源 姜文奇 Liu Meng;An Junshe;Shi Yilong;Jiang Yuanyuan;Jiang Wenqi(University of Chinese Academy of Science,Beijing 100190,China;National Space Science Center,Key Laboratory of Integrated Avionics and Information Tecnology for Complex Aerospace Systems,Beijing 100190,China;Loongson Technology Corporation Limited,BeiJing 100095,China)

机构地区：[1]中国科学院大学,北京100190 [2]国家空间科学中心复杂航天系统综合电子与信息技术实验室,北京100190 [3]龙芯中科技术有限公司,北京100095

出　　处：《电子技术应用》2018年第11期1-4,共4页Application of Electronic Technique

摘　　要：针对空间应用中有效载荷对数据高速传输的要求,根据SpaceWire (SpW)协议提出了一种SpaceWire节点控制器的设计方案。使用Verilog可编程语言进行逻辑设计,实现了节点控制器IP,以XC4VSX55 FPGA做原型验证,验证了系统整体设计的可行性。在专用集成芯片龙芯1E300中实现了该知识产权核(Intellectual Property,IP),搭建测试环境,验证了数据传输过程中的同步性和准确性,ASIC实际测试结果表明设计的节点控制器信号传输速率可达200 Mb/s,满足协议规定的功能。In view of the requirement of high-speed transmission of payload data in space application,a design scheme of SpaceWire interface controller is proposed according to the SpaceWire protocol.The logic is designed by Verilog programming language,and the interface controller IP is implemented.The prototype is verified by XC4VSX55 FPGA,and the feasibility of the whole design is verified.The IP is implemented in the ASIC LoongSon 1E300.The testing environment is setup,and the synchronization and accuracy of the data transmission process is verified.The actual test results of the ASIC show that the interface′s signaling rates can reach 200 Mb/s,which satisfies the functions stipulated by the protocol.

关 键 词：SPACEWIRE 节点控制器 CODEC 高速数据传输 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]