一种用于高性能计算的高速内存和封装解决方案  

A High Speed Memory and Packaging Solution for High-performance Computing Applications

作　　者：陈宏铭 黄昱人 蔡鸿寅 朱伟涛 黄耀林 CHEN Hong-Ming;HUANG Yu-Ren;TSAI Hung-Yin;CHU Vai-Tou;HWANG Yaw-Lin(Global Unichip Corp.,Shanghai,200080 China)

机构地区：[1]创意电子股份有限公司,上海200080

出　　处：《中国集成电路》2018年第12期29-36,共8页China lntegrated Circuit

摘　　要：HBM高速内存接口设计解决现代DDR的两个关键问题,它增加了内存的可用带宽与降低功耗。本文介绍了第二代高带宽存储器(HMB2)高速内存控制器与物理层IP与配套晶圆基底封装(COWOS)的设计挑战及创意电子提供的相应解决方案。为了评估这一概念,HBM与CoWoS的原型采用台积电16纳米CMOS实现。从硅验证的结果也证明了整套方案的有效性。这些技术包括:HMB2高速内存控制器、HMB2高速内存物理层和台积电所提供的CoWoS封装。所提出的方法都是对高性能计算芯片所需高带宽的有效解决方案并减少面积与功耗开销。HBM interface design solves two key problems of modern DDR interface.It increases memory bandwidth and reduces power consumption.This paper presents challenges of the HBM2 controller and PHY IP design along with CoWoS package solutions provided by GUC.To evaluate this concept,a prototype of HBM and CoWoS was implemented in TSMC 16-nm CMOS.The silicon-proven results are also demonstrated to validate the effectiveness of this provided solution.The techniques include the HBM2 controller/PHY,and the CoWoS package proposed by TSMC.The proposed methods are effective solutions to provide high bandwidth for high performance computing chips and reduce overhead of area and power consumption.

关 键 词：高性能计算 第二代高带宽存储器 晶圆基底封装 

分 类 号：TP38[自动化与计算机技术—计算机系统结构]