基于FPGA的故障修复演化技术研究  

Fault recovery evolution technique based on FPGA

作　　者：王洁[1] 康俊杰 周宽久[1] WANG Jie;KANG Jun-jie;ZHOU Kuan-jiu(School of Software Technology,Dalian University of Technology,Dalian 116620,China)

机构地区：[1]大连理工大学软件学院,辽宁大连116620

出　　处：《计算机工程与科学》2018年第12期2120-2125,共6页Computer Engineering & Science

基　　金：国家自然科学基金(61472100);中央高校基本科研业务费(DUT17JC26)

摘　　要：演化硬件的自修复特性能够有效解决电路系统的可修复性故障,但演化硬件存在电路演化速度慢、演化成功率不高的缺陷,如何在修复约束期限内完成电路演化成为关键难点。提出一种基于演化硬件的实时系统容错架构,通过建立故障树实时监测电路故障,利用故障补偿机制维持系统正常运行,并采用演化硬件技术修复电路故障,实现故障的在线实时修复。采用FPGA构建容错系统测试环境,通过随机故障注入对比验证不同演化算法的自修复能力,实验结果表明,在实时性约束下故障电路的修复率达到95%,有效提升了系统的稳定性和可靠性。The self-repairing feature of evolution hardware can effectively recover repairable faults of circuit systems.Due to the slow rate and low success rate in circuit evolution process,how to accomplish the evolution within the time constraint becomes a major challenge.We propose a real-time fault-tolerant system based on evolution hardware,in which fault analysis trees are used to monitor circuit faults in real time,a fault compensation mechanism to maintain the normal operation of the system,and the evolution hardware technique is adopted to repair circuit faults so as to realize online real-time repair of faults.We test the fault-tolerant system on FPGA through random fault injection.Several evolutionary algorithms are used to verify the self-repairing capability of the fault-tolerant system.The results show that the repair rate of the fault circuit can reach 95%under the real-time constraint and the stability and reliability of the system are improved.

关 键 词：容错系统 演化硬件 演化算法 FPGA 

分 类 号：TP302.8[自动化与计算机技术—计算机系统结构]